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  1. general description the ADC1005S060 is a 10-bit high-speed low-power analog-to-digital converter (adc) for professional video and other applications. it converts the analog input signal into 10-bit binary or gray coded digital words at a maximum sampling rate of 60 mhz. all digital inputs and outputs are transistor-transistor logic (ttl) and cmos compatible, although a low-level sine wave clock input signal is allowed. the device requires an external source to drive its reference ladder. 2. features n 10-bit resolution (binary or gray code) n sampling rate up to 60 mhz n dc sampling allowed n one clock cycle conversion only n high signal-to-noise ratio over a large analog input frequency range (9.3 effective bits at 5 mhz full-scale input at f clk = 60 mhz) n no missing codes guaranteed n in-range (ir) cmos output n ttl and cmos levels compatible digital inputs n 2.7 v to 3.6 v cmos digital outputs n low-level ac clock input signal allowed n external reference voltage regulator n power dissipation only 312 mw (typical) n low analog input capacitance, no buffer ampli?er required n no sample-and-hold circuit required 3. applications n video data digitizing n radar n barcode scanners n digital instrumentation n transient signal analysis n sd modulators n medical imaging ADC1005S060 single 10 bits adc, up to 60 mhz rev. 02 13 august 2008 product data sheet
ADC1005S060_2 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 02 13 august 2008 2 of 19 nxp semiconductors ADC1005S060 single 10 bits adc, up to 60 mhz 4. quick reference data 5. ordering information table 1. quick reference data v cca = 4.75 v to 5.25 v; v ccd = 4.75 v to 5.25 v; agnd and dgnd shorted together; t amb =0 cto70 c; typical values measured at v cca = v ccd = 5 v; v cco = 3.3 v; v rb = 1.3 v; v rt = 3.7 v; c l = 10 pf and t amb =25 c unless otherwise speci?ed. symbol parameter conditions min typ max unit v cca analog supply voltage 4.75 5.0 5.25 v v ccd digital supply voltage 4.75 5.0 5.25 v v cco output supply voltage 2.7 3.3 3.6 v i cca analog supply current - 29 37 ma i ccd digital supply current - 33 40 ma i cco output supply current f clk = 60 mhz; ramp input - 0.5 2.0 ma inl integral non-linearity - 0.8 2.0 lsb dnl differential non-linearity - 0.35 0.9 lsb f clk(max) maximum clock frequency 60 - - mhz p tot total power dissipation f clk =60 mhz; ramp input - 312 411 mw table 2. ordering information type number package name description version ADC1005S060ts ssop28 plastic shrink small outline package; 28 leads; body width 5.3 mm sot341-1
ADC1005S060_2 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 02 13 august 2008 3 of 19 nxp semiconductors ADC1005S060 single 10 bits adc, up to 60 mhz 6. block diagram fig 1. block diagram 12 dgnd n.c. 6 8 r lad 7 9 rb rm rt vi 11 v ccd 3 26 v cca 21 22 23 24 20 d4 d5 d6 d7 d8 19 18 25 2 d3 d2 17 d1 16 d0 d9 in-range latch cmos outputs latches clock driver 014aaa519 1 clk 10 15 oe gray tc ADC1005S060 13 v cco 4 agnd 14 ognd analog voltage input data outputs lsb msb ir output analog - to - digital converter cmos output 5, 27, 28
ADC1005S060_2 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 02 13 august 2008 4 of 19 nxp semiconductors ADC1005S060 single 10 bits adc, up to 60 mhz 7. pinning information 7.1 pinning 7.2 pin description fig 2. pin con?guration adc1005s 060ts clk n.c. tc n.c. v cca ir agnd d9 n.c. d8 rb d7 rm d6 vi d5 rt d4 oe d3 v ccd d2 dgnd d1 v cco d0 ognd gray 014aaa520 1 2 3 4 5 6 7 8 9 10 11 12 13 14 16 15 18 17 20 19 22 21 24 23 26 25 28 27 table 3. pin description symbol pin description clk 1 clock input tc 2 twos complement input (active low) v cca 3 analog supply voltage (5 v) agnd 4 analog ground n.c. 5 not connected rb 6 reference voltage bottom input rm 7 reference voltage middle input vi 8 analog voltage input rt 9 reference voltage top input oe 10 output enable input (active low) v ccd 11 digital supply voltage (2.7 v to 3.6 v) dgnd 12 digital ground v cco 13 supply voltage for output stages (2.7 v to 3.6 v) ognd 14 output ground gray 15 gray code input (active high) d0 16 data output; bit 0 (least signi?cant bit (lsb)) d1 17 data output; bit 1 d2 18 data output; bit 2 d3 19 data output; bit 3
ADC1005S060_2 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 02 13 august 2008 5 of 19 nxp semiconductors ADC1005S060 single 10 bits adc, up to 60 mhz 8. limiting values [1] the supply voltages v cca , v ccd and v cco may have any value between - 0.3 v and +7.0 v provided that the supply voltage differences d v cc are respected. 9. thermal characteristics d4 20 data output; bit 4 d5 21 data output; bit 5 d6 22 data output; bit 6 d7 23 data output; bit 7 d8 24 data output; bit 8 d9 25 data output; bit 9 (most signi?cant bit (msb)) ir 26 in-range data output n.c. 27 not connected n.c. 28 not connected table 3. pin description continued symbol pin description table 4. limiting values in accordance with the absolute maximum rating system (iec 60134). symbol parameter conditions min max unit v cca analog supply voltage [1] - 0.3 +7.0 v v ccd digital supply voltage [1] - 0.3 +7.0 v v cco output supply voltage [1] - 0.3 +7.0 v d v cc supply voltage difference v cca - v ccd - 0.1 +1.0 v v ccd - v cco ; v cca - v cco - 0.1 +4.0 v v i input voltage referenced to agnd - 0.3 +7.0 v v i(clk)(p-p) peak-to-peak clock input voltage for switching; referenced to dgnd -v ccd v i o output current - 10 ma t stg storage temperature - 55 +150 c t amb ambient temperature - 40 +85 c t j junction temperature - 150 c table 5. thermal characteristics symbol parameter condition value unit r th(j-a) thermal resistance from junction to ambient in free air 110 k/w
ADC1005S060_2 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 02 13 august 2008 6 of 19 nxp semiconductors ADC1005S060 single 10 bits adc, up to 60 mhz 10. characteristics table 6. characteristics v cca = 4.75 v to 5.25 v; v ccd = 4.75 v to 5.25 v; agnd and dgnd shorted together; t amb =0 cto70 c; typical values measured at v cca = v ccd = 5 v; v cco = 3.3 v; v rb = 1.3 v; v rt = 3.7 v; c l = 10 pf and t amb =25 c unless otherwise speci?ed. symbol parameter conditions min typ max unit supplies v cca analog supply voltage 4.75 5.0 5.25 v v ccd digital supply voltage 4.75 5.0 5.25 v v cco output supply voltage 2.7 3.3 3.6 v d v cc supply voltage difference v cca - v ccd - 0.2 - +0.2 v v cca - v cco ; v ccd - v cco - 0.2 +2.55 v i cca analog supply current - 2937ma i ccd digital supply current - 3340ma i cco output supply current f clk = 60 mhz; ramp input - 0.5 2.0 ma p tot total power dissipation f clk = 60 mhz; ramp input - 312 411 mw inputs clock input clk (referenced to dgnd) [1] v il low-level input voltage 0 - 0.8 v v ih high-level input voltage 2- v ccd v i il low-level input current v clk = 0.8 v - 10 +1 m a i ih high-level input current v clk = 2 v - 2 10 m a c i input capacitance - 2 - pf inputs oe tc and gray (referenced to dgnd); see t ab le 3 and 4 v il low-level input voltage 0 - 0.8 v v ih high-level input voltage 2- v ccd v i il low-level input current v il = 0.8 v - 1- - m a i ih high-level input current v ih = 2.0 v - - 1 m a analog input vi (referenced to agnd) i il low-level input current v i = v rb = 1.3 v - 0 - m a
ADC1005S060_2 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 02 13 august 2008 7 of 19 nxp semiconductors ADC1005S060 single 10 bits adc, up to 60 mhz i ih high-level input current v i = v rt = 3.7 v - 55 - m a y i input admittance f i = 5 mhz [2] r i, input resistance - 45 - k w c i, input capacitance 357pf reference voltages for the resistor ladder; see t ab le 7 v rb voltage on pin rb 1.2 1.3 2.2 v v rt voltage on pin rt 3.4 3.7 v cca - 0.8 v v ref(dif) differential reference voltage v rt - v rb 2.2 2.4 3.2 v i ref reference current v ref(dif) = 2.4 v - 17.6 - ma r lad ladder resistance - 136 - w tc rlad ladder resistor temperature coef?cient - 253 - m w /k v offset offset voltage v ref(dif) = 2.4 v bottom [3] - 200 - mv top [3] - 190 - mv v i(a)(p-p) peak-to-peak analog input voltage v ref(dif) = 2.4 v [4] 1.95 2.01 2.10 v outputs digital outputs d9 to d0 and ir (referenced to ognd) v ol low-level output voltage i o = 1 ma 0 - 0.5 v v oh high-level output voltage i o = - 1ma v cco - 0.5 - v cco v i oz off-state output current 0.5 v < v o ADC1005S060_2 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 02 13 august 2008 8 of 19 nxp semiconductors ADC1005S060 single 10 bits adc, up to 60 mhz e offset offset error middle code - 1 - lsb e g gain error from device to device [5] - 0.5 - % bandwidth b bandwidth full-scale sine wave [6] - 30 - mhz 75 % full-scale sine wave - 45 - mhz small signal at mid-scale; v i = 10 lsb at code 512 - 700 - mhz t s(lh) low to high settling time full-scale square wave; see figure 6 [7] -5-ns t s(hl) high to low settling time full-scale square wave; see figure 6 [7] -5-ns harmonics a 2h second harmonic level f i = 5 mhz - - 68 - db a 3h third harmonic level f i = 5 mhz - - 67 - db thd total harmonic distortion f i = 5 mhz - - 64 - db f i = 15 mhz - - 57 - db sfdr spurious free dynamic range f i = 5 mhz - 72 db signal-to-noise ratio [8] s/n signal-to-noise ratio without harmonics; f i = 5 mhz -58-db without harmonics; f i =15mhz 53 57 - db effective bits [8] enob effective number of bits f i = 5 mhz - 9.3 - bits f i = 10 mhz - 8.9 - bits f i = 15 mhz - 8.8 - bits f i = 20 mhz - 8.6 - bits two-tone intermodulation [9] a im intermodulation suppression f clk = 60 mhz - - 67 - db bit error rate ber bit error rate f i = 5 mhz; v i = 16 lsb at code 512 -10 - 13 - times/samples timing (f clk = 60 mhz; c l = 10 pf); see figure 4 [10] t d(s) sampling delay time - 0.7 2 ns t h(o) output hold time 4 - - ns t d(o) output delay time v cco = 2.7 v - 10 14 ns v cco = 3.3 v - 9 13 ns table 6. characteristics continued v cca = 4.75 v to 5.25 v; v ccd = 4.75 v to 5.25 v; agnd and dgnd shorted together; t amb =0 cto70 c; typical values measured at v cca = v ccd = 5 v; v cco = 3.3 v; v rb = 1.3 v; v rt = 3.7 v; c l = 10 pf and t amb =25 c unless otherwise speci?ed. symbol parameter conditions min typ max unit
ADC1005S060_2 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 02 13 august 2008 9 of 19 nxp semiconductors ADC1005S060 single 10 bits adc, up to 60 mhz [1] the rise and fall times of the clock signal must not be less than 0.5 ns. [2] the input admittance is [3] analog input voltages producing code 0 up to and including code 1023: a) v offset bottom is the difference between the analog input which produces data equal to 00 and the reference voltage on pin rb (v rb ) at t amb = 25 c. b) v offset top is the difference between the reference voltage on pin rt (v rt ) and the analog input which produces data outputs equal to code 1023 at t amb = 25 c . [4] to ensure the optimum linearity performance of such a converter architecture the lower and upper extremities of the converter reference resistor ladder are connected to pins rb and rt via offset resistors r ob and r ot as shown in figure 3 . a) the current ?owing into the resistor ladder is and the full-scale input range at the converter, to cover code 0 to 1023 is b) since r l , r ob and r ot have similar behavior with respect to process and temperature variation, the ratio will be kept reasonably constant from device to device. consequently, variation of the output codes at a given input voltage depends mainly on the difference v rt - v rb and its variation with temperature and supply voltage. when several adcs are connected in parallel and fed with the same reference source, the matching between each of them is optimized. [5] [6] the analog bandwidth is de?ned as the maximum input sine wave frequency which can be applied to the device. no glitches grea ter than 2 lsb, neither any signi?cant attenuation are observed in the reconstructed signal. [7] the analog input settling time is the minimum time required for the input signal to be stabilized after a sharp full-scale i nput (square wave signal) in order to sample the signal and obtain correct output data. [8] effective bits are obtained via a fast fourier transform (fft) treatment taking 8000 acquisition points per equivalent funda mental period. the calculation takes into account all harmonics and noise up to half the clock frequency (nyquist frequency). conversi on to signal-to-noise ratio: s/n = enob 6.02 + 1.76 db. [9] intermodulation measured relative to either tone with analog input frequencies of 4.3 mhz and 4.5 mhz. the two input signals have the same amplitude and the total amplitude of both signals provides full-scale to the converter. [10] output data acquisition: the output data is available after the maximum delay time of t d(o) . nxp recommends the lowest possible output load. these parameters are guaranteed by characterization and not by production test. c l load capacitance - - 10 pf sr slew rate v cco = 2.7 v 0.2 0.3 - v/ns 3-state output delay times (f clk = 60 mhz; v cco = 3.3 v); see figure 5 t dzh ?oat to active high delay time - 1620ns t dzl ?oat to active low delay time - 3034ns t dhz active high to ?oat delay time - 2530ns t dlz active low to ?oat delay time - 2327ns table 6. characteristics continued v cca = 4.75 v to 5.25 v; v ccd = 4.75 v to 5.25 v; agnd and dgnd shorted together; t amb =0 cto70 c; typical values measured at v cca = v ccd = 5 v; v cco = 3.3 v; v rb = 1.3 v; v rt = 3.7 v; c l = 10 pf and t amb =25 c unless otherwise speci?ed. symbol parameter conditions min typ max unit y i 1 r i ---- - j w c i ++ i v rt v rb C r ob r l r ot ++ ---------------------------------------- = v i r l i l r l r ob r l r ot ++ ---------------------------------------- v rt v rb + () 0.8375 v rt v rb C () == = r l r ob r l r ot ++ ---------------------------------------- e g v 1023 v 0 C () v ip p C () C v ip p C () -------------------------------------------------------- - 100 =
ADC1005S060_2 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 02 13 august 2008 10 of 19 nxp semiconductors ADC1005S060 single 10 bits adc, up to 60 mhz 11. additional information relating to t ab le 6 fig 3. converter reference resistor ladder table 7. output coding and input voltage (typical values; referenced to agnd, v rb = 1.3 v, v rt = 3.7 v; binary/gray codes) code v i(a)(p-p) (v) ir binary outputs d9 to d0 gray outputs d9 to d0 under?ow < 1.5 0 00 0000 0000 00 0000 0000 0 1.5 1 00 0000 0000 00 0000 0000 1 - 1 00 0000 0001 00 0000 0001 - 1022 - 1 11 1111 1110 10 0000 0001 1023 3.51 1 11 1111 1111 10 0000 0000 over?ow > 3.51 0 11 1111 1111 10 0000 0000 table 8. output coding and input voltage (typical values; referenced to agnd; binary/twos complement codes) code v i(a)(p-p) (v) ir binary outputs d9 to d0 twos complement outputs d9 to d0 under?ow < 1.5 0 00 0000 0000 10 0000 0000 0 1.5 1 00 0000 0000 10 0000 0000 1 - 1 00 0000 0001 10 0000 0001 - 1022 - 1 11 1111 1110 01 1111 1110 1023 3.51 1 11 1111 1111 01 1111 1111 over?ow > 3.51 0 11 1111 1111 01 1111 1111 014aaa521 rt rb rm r lad r ot r l r l r l r l i l r ob code 1023 code 0
ADC1005S060_2 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 02 13 august 2008 11 of 19 nxp semiconductors ADC1005S060 single 10 bits adc, up to 60 mhz table 9. tc mode selection tc oe d9 to d0 ir x 1 high impedance high impedance 0 0 active; twos complement active 1 0 active; binary active table 10. gray mode selection gray oe d9 to d0 ir x 1 high impedance high impedance 0 0 active; binary active 1 0 active; gray active fig 4. timing diagram sample n + 1 sample n clk 014aaa522 sample n + 2 sample n + 1 sample n sample n + 2 50 % v ih v il vi data d0 to d9 high low 50 % data n + 1 data n data n - 1 data n - 2 t d(o) t w(clk)h t w(clk)l t d(s) t h(o)
ADC1005S060_2 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 02 13 august 2008 12 of 19 nxp semiconductors ADC1005S060 single 10 bits adc, up to 60 mhz frequency on pin oe = 100 khz. fig 5. timing diagram and test conditions of 3-state output delay time fig 6. analog input settling time diagram ADC1005S060 oe 10 pf 3 . 3 k w s1 test v ccd t dlz v ccd t dzl dgnd t dzh t dhz dgnd 014aaa523 v ccd s1 50 % 50 % 50 % 10 % 90 % low low high high oe t dzh t dzl t dhz v ccd output data low output data high t dlz 014aaa524 code 1023 code 0 50 % 50 % clk vi t s(lh) t s(hl) 50 % 50 % 2 ns 2 ns 0.5 ns 0.5 ns
ADC1005S060_2 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 02 13 august 2008 13 of 19 nxp semiconductors ADC1005S060 single 10 bits adc, up to 60 mhz fig 7. d9 to d0 and ir outputs fig 8. vi analog input 014aaa525 v cco d9 to d0 ir ognd v cca vi agnd 014aaa526 fig 9. oe gray and tc inputs fig 10. rb, rm and rt inputs 014aaa527 v cco ognd oe tc gray v cca rt rm rb agnd 014aaa528 r l r l r l r l fig 11. clk input v ccd clk 1.5 v dgnd 014aaa529
ADC1005S060_2 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 02 13 august 2008 14 of 19 nxp semiconductors ADC1005S060 single 10 bits adc, up to 60 mhz 12. application information 12.1 application diagrams 12.2 alternative parts the following alternative parts are also available: the analog and digital supplies should be separated and decoupled. a user manual is available that describes the demonstration board that uses the version adc1004s030/040/050 family with an application environment. (1) rb, rm and rt are decoupled to agnd (2) decoupling capacitor for supplies must be placed close to the device. (3) this resistor is mandatory (33 w is its minimum value) and must be near the clock source. fig 12. application diagram (3) 33 w adc1005s 060ts clk n.c. tc n.c. v cca ir agnd d9 n.c. d8 rb d7 rm d6 vi d5 rt d4 oe d3 v ccd d2 dgnd d1 v cco d0 ognd gray 014aaa530 1 2 3 4 5 6 7 8 9 10 11 12 13 14 16 15 18 17 20 19 22 21 24 23 26 25 28 27 100 nf 100 nf 100 nf 100 nf 100 nf 100 nf (2) (2) (2) agnd agnd agnd table 11. alternative parts type number description sampling frequency adc0804s030 single 8 bits adc [1] 30 mhz adc0804s040 single 8 bits adc [1] 40 mhz adc0804s050 single 8 bits adc [1] 50 mhz adc1003s030 single 10 bits adc, with internal reference regulator [1] 30 mhz adc1003s040 single 10 bits adc, with internal reference regulator [1] 40 mhz adc1003s050 single 10 bits adc, with internal reference regulator [1] 50 mhz
ADC1005S060_2 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 02 13 august 2008 15 of 19 nxp semiconductors ADC1005S060 single 10 bits adc, up to 60 mhz [1] pin to pin compatible adc1004s030 single 10 bits adc [1] 30 mhz adc1004s040 single 10 bits adc [1] 40 mhz adc1004s050 single 10 bits adc [1] 50 mhz table 11. alternative parts type number description sampling frequency
ADC1005S060_2 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 02 13 august 2008 16 of 19 nxp semiconductors ADC1005S060 single 10 bits adc, up to 60 mhz 13. package outline fig 13. package outline sot341-1 (ssop28) unit a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec jeita mm 0.21 0.05 1.80 1.65 0.38 0.25 0.20 0.09 10.4 10.0 5.4 5.2 0.65 1.25 7.9 7.6 0.9 0.7 1.1 0.7 8 0 o o 0.13 0.1 0.2 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.2 mm maximum per side are not included. 1.03 0.63 sot341-1 mo-150 99-12-27 03-02-19 x w m q a a 1 a 2 b p d h e l p q detail x e z e c l v m a (a ) 3 a 114 28 15 0.25 y pin 1 index 0 2.5 5 mm scale ssop28: plastic shrink small outline package; 28 leads; body width 5.3 mm sot341-1 a max. 2
ADC1005S060_2 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 02 13 august 2008 17 of 19 nxp semiconductors ADC1005S060 single 10 bits adc, up to 60 mhz 14. revision history table 12. revision history document id release date data sheet status change notice supersedes ADC1005S060_2 20080813 product data sheet - ADC1005S060_1 modi?cations: ? corrections made to inl and dnl conditions in t ab le 1 . ? corrections made to several entries and notes in t ab le 6 . ? correction made to table description in t ab le 7 . ? correction made to column d9 to d0 in t ab le 10 . ? correction made to figure 8 . ? correction made to figure 10 . ADC1005S060_1 20080616 product data sheet - -
ADC1005S060_2 ? nxp b.v. 2008. all rights reserved. product data sheet rev. 02 13 august 2008 18 of 19 nxp semiconductors ADC1005S060 single 10 bits adc, up to 60 mhz 15. legal information 15.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term short data sheet is explained in section de?nitions. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple dev ices. the latest product status information is available on the internet at url http://www .nxp .com . 15.2 de?nitions draft the document is a draft version only. the content is still under internal review and subject to formal approval, which may result in modi?cations or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. short data sheet a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request via the local nxp semiconductors sales of?ce. in case of any inconsistency or con?ict with the short data sheet, the full data sheet shall prevail. 15.3 disclaimers general information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. right to make changes nxp semiconductors reserves the right to make changes to information published in this document, including without limitation speci?cations and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use nxp semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors accepts no liability for inclusion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customers own risk. applications applications that are described herein for any of these products are for illustrative purposes only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the speci?ed use without further testing or modi?cation. limiting values stress above one or more limiting values (as de?ned in the absolute maximum ratings system of iec 60134) may cause permanent damage to the device. limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the characteristics sections of this document is not implied. exposure to limiting values for extended periods may affect device reliability. terms and conditions of sale nxp semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www .nxp .com/pro? le/ter ms , including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by nxp semiconductors. in case of any inconsistency or con?ict between information in this document and such terms and conditions, the latter will prevail. no offer to sell or license nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. quick reference data the quick reference data is an extract of the product data given in the limiting values and characteristics sections of this document, and as such is not complete, exhaustive or legally binding. 15.4 trademarks notice: all referenced brands, product names, service names and trademarks are the property of their respective owners. 16. contact information for more information, please visit: http://www .nxp.com for sales of?ce addresses, please send an email to: salesad dresses@nxp.com document status [1] [2] product status [3] de?nition objective [short] data sheet development this document contains data from the objective speci?cation for product development. preliminary [short] data sheet quali?cation this document contains data from the preliminary speci?cation. product [short] data sheet production this document contains the product speci?cation.
nxp semiconductors ADC1005S060 single 10 bits adc, up to 60 mhz ? nxp b.v. 2008. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com date of release: 13 august 2008 document identifier: ADC1005S060_2 please be aware that important notices concerning this document and the product(s) described herein, have been included in section legal information. 17. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 quick reference data . . . . . . . . . . . . . . . . . . . . . 2 5 ordering information . . . . . . . . . . . . . . . . . . . . . 2 6 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 pinning information . . . . . . . . . . . . . . . . . . . . . . 4 7.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 7.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 8 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 9 thermal characteristics. . . . . . . . . . . . . . . . . . . 5 10 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 6 11 additional information relating to t ab le 6 . . . 10 12 application information. . . . . . . . . . . . . . . . . . 14 12.1 application diagrams . . . . . . . . . . . . . . . . . . . 14 12.2 alternative parts . . . . . . . . . . . . . . . . . . . . . . . 14 13 package outline . . . . . . . . . . . . . . . . . . . . . . . . 16 14 revision history . . . . . . . . . . . . . . . . . . . . . . . . 17 15 legal information. . . . . . . . . . . . . . . . . . . . . . . 18 15.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 18 15.2 de?nitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 15.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 15.4 trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 16 contact information. . . . . . . . . . . . . . . . . . . . . 18 17 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19


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